The present invention relates to a semiconductor device and a manufacturing method thereof.
The configuration of a wiring layer of the uppermost layer and a passivation film covering the wiring layer in a semiconductor device is disclosed, for example, in the following Japanese Unexamined Patent Application Publication No. Hei 3(1991)-83340 (see Patent Document 1) and Japanese Unexamined Patent Application Publication No. 2013-197407 (see Patent Document 2).
In Japanese Unexamined Patent Application Publication No. Hei 3(1991)-83340, Al (aluminum) wiring is formed over the upper surface of an atmospheric pressure-CVD (Chemical Vapor Deposition) insulating film. An SiN film (silicon nitride film) is formed, as a passivation film, so as to cover the atmospheric pressure-CVD insulating film and the Al wiring.
In FIG. 2 of Japanese Unexamined Patent Application Publication No. 2013-197407, an etching stopper film and a plurality of wiring are formed over an interlayer insulating film including a silicon oxide film. The wiring has a barrier metal film, a wiring film, and a passivation film. A cap insulating film is formed over the wiring such that an air gap is provided between the cap insulating film and the etching stopper film.